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Building CNN acceleration on FPGAs for Edge Applications, with minimal changes

October 14, 202111:30 - 12:00AI Hardware - AI Expo 2021

Moderator

David Wyatt

David Wyatt

CTO, President, PixelDisplay
  • October 14, 2021
  • 11:30 AM - 12:00 PM

Speaker

Alan Mishchenko

Alan Mishchenko

Chief Architect, ComputEra

Abstract

Machine learning solutions are widely used and require processing massive workloads, which is done by hardware accelerators. FPGA-based accelerators have their distinctive advantages: low power, reasonable cost, and flexibility to adapt to changes in ML models. The proposed FPGA-based accelerator is designed with usability in mind: it works with FPGAs from several vendors and comes with a software stack needed to quantize and compile a network into an accelerator data stream, reducing the accelerator development time from months to days.